Unity gain bandwidth of an opamp in an integrator

[mordak]

Hey guys,

I was designing an integrator (Active RC) to be used in a data converter. The opamp I designed was a two stage one, with a gain about 90dB. After designing the opamp, I saw that the whole system doesn't work just because of the opmap, then I replaced it with an ideal opamp and defined its frequency bandwidth. The interesting part was that I noticed first pole was very important in this opamp, though what I expected was completely different, I thought if gain is enough we need to care about gain bandwidth product, not the first pole per se. For example, say the whole system works when gain of the opamp is 6odB and W3dB = 1M, when I double the gain and half the W3dB it does not work anymore, though in both cases unity gain bandwidth is constant. I appreciate if someone tell me what I'm missing here.
Thanks

 

[FvM]

You didn't tell what "does not work anymore" means. Also, what's the integrator time constant? I presume the circuit of interest is an inverting integrator.

 

[mordak]

You didn't tell what "does not work anymore" means. Also, what's the integrator time constant? I presume the circuit of interest is an inverting integrator.

Thanks for your response. I'm sorry for not providing enough description. I used those integrators in a continuous time delta sigma, so when I am saying it doesn't work anymore, it means output of the whole delta sigma ADC goes to instability and ADC does not work properly, and it happens when all the other components are ideal, so the reason of the instability is just the integrator. About the time constant, would it make any difference for the location of the first pole? (those numbers I provided above were just examples, actually I don't have access to my design right now, but what I noticed by simulation was that location of the first pole is more important than the unity gain bandwidth, does it make sense?)

 

[FvM]

In a reasonable integrator design, you'll have sufficient loop gain and the deviation from ideal integrator behavior will be respectively small and also the parameter sensitivity.

There are two explanationa why your design acts apparently different:
- the integrator loop gain is too low, which will particularly show at low frequencies
- the overall design is already at it's stability margin so that smaller variations of the integrator transfer function kill the stability

 

[mordak]

There are two explanationa why your design acts apparently different:
- the integrator loop gain is too low, which will particularly show at low frequencies
- the overall design is already at it's stability margin so that smaller variations of the integrator transfer function kill the stability

The thing is the first real opamp I designed had very high gain, it was a two stage opamp, about 90dB and I couldn't get the whole ADC work and it went to instability. Then I designed a single stage opamp with low gain but higher 3dB frequency, and it worked. I think it cannot be because of the low loop gain, because when I used an ideal opamp with gain of "X" and first pole at "Y" it worked. Then to decrease the power consumption tried to increase the gain but lower the first pole, so set the gain to "2X" and first pole to "Y/2" and it didn't work anymore. You see I increased the gain, so theoretically it should work better, also gain bandwidth product is same as the first case.
You say the performance of the integrator should not be dependent on the location of the first pole per se, assuming the gain is sufficient enough?

 

[LvW]

In order to find the error source I recommend to test the opamp at first with simple resistive feedback - large and low gain values.
What about dc input offset? Do you know how offset can violate integrator application?

 

[mordak]

In order to find the error source I recommend to test the opamp at first with simple resistive feedback - large and low gain values.
What about dc input offset? Do you know how offset can violate integrator application?

Thanks for the response. Actually I have already done that, the real opamp works both with low and high gain, the difference is the error of the opamp output, which is less for the high gain, but I cannot test the opamp in an integrator by itself, since it needs to be in a feedback loop. But if we don't consider whether the real opamp I designed works properly or not, we can focus on the ideal one. Basically what I did was getting back to the first stage of my design and using all ideal components, and the only difference was that I defined cut off frequency for one opamp. With the ideal opamp the only factor could be gain and gain bandwidth, and now what befuddled me is that the location of the first pole is more important than the overall gain bandwidth, considering always chosen gain for the opamp is sufficient. First let's ask whether I'm wrong for assuming that the cut off frequency doesn't play any role if the overall gain bandwidth is sufficient enough? In other words, we can increase the gain to more than what we want, in order to lower the cut off frequency, and still get the same unity gain bandwidth, and I think the opamp should behave the same since UGBW is constant, shouldn't it?
Regarding the offset, since I tested it with an ideal opamp, I think offset is not an issue.

 

[FvM]

but I cannot test the opamp in an integrator by itself, since it needs to be in a feedback loop.

Apparently you are talking about pure simulation problems. So you can well measure the integrator transfer function on it's own.

 

[LvW]

First let's ask whether I'm wrong for assuming that the cut off frequency doesn't play any role if the overall gain bandwidth is sufficient enough? In other words, we can increase the gain to more than what we want, in order to lower the cut off frequency, and still get the same unity gain bandwidth, and I think the opamp should behave the same since UGBW is constant, shouldn't it?
Regarding the offset, since I tested it with an ideal opamp, I think offset is not an issue.

First point: Yes - I think, you are right. As long as the open-loop gain Aol of the opamp is sufficient high at the operating frequency (!!) the circuit should do what you want (within some error limits). I would say that, at least, a value of Aol=100 is needed.
Second point: You want to test if your circuit is sensitive to a non-ideal opamp property (offset) - and what are you doing? For this test you are using an IDEAL opamp model. Sounds a bit weird, does it not?