Understanding the Miller effect properly

[mirror_pole]

Hello guys,

I have a question regarding the miller effect i actually never thought about. For a simple common source stage small signal imput impedance contains Cdg(1+gmRout), which represents the Miller effect. What i dont quit understand is, do i really have bigger (physical) capacitance because of this effect, or how do i have to think about it? Depending on the operation region rds can vary and therefore Cdg(1+gmRout). That means that the gate drain capacitance seeing from the input is somehow variable, depending on the operation region of the MOSFET ?

 

[Dominik Przyborowski]

It is a magic of negative feedback lowering impedance seen into feedback system.
Physically, you have difference in signal amplitude seen at the Capacitor both ends, but Capacitor capacitance is unchanged.

 

[dick_freebird]

The expression is the "effective" capacitance - in the regions
where you have gain, signal will behave "as if".

But as far as storing 100-1000X the electrical energy, that's
a hard "no!".