Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

unbound pin in assura LVS

Status
Not open for further replies.

Alekcei

Newbie level 5
Joined
Nov 3, 2010
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,332
Hi all!
I have got the same problem with unbound pin after LVS cheking.
Error: Unbound pin sch||lay 3||0
Assura recognize vdd and gnd, but doesn't understand "in" and "out" pins.
Thank's in advance!
Alex.
 

Please check if proper layers are used for putting pins. We have faced these issues if pins layers are improper.
 
For pin I use Met1 for label M1text.
M1TEXT =textToPin("M1text" type ("drawing")) this string from extract ruls.
 

What LVS avParameters and avCompare ruls must be set for pin's ???
 

Hi,

Do you have something like below in your code?
label(M1TEXT Metal1)

textToPin alone does not link layers Met1 to M1text , although it is needed.
I don't think there's any avParameters and avCompare rules which need to be set - I think in general the default should be ok.

Best regards,
I-FAB
 

Yes I have:
label (Met1_text Metal1_ML6). (In geomConnect comand)

---------- Post added at 14:24 ---------- Previous post was at 13:59 ----------

Let's propose that in the extract ruls, the layers are named as Met1_text and Metal1_ML6.
But in the LSW, they are named as M1text and Met1.
The question is: can this difference in layer's names effect the mismatch in the pins?
 

Hi Alekcei,

The question is: can this difference in layer's names effect the mismatch in the pins?
Of course!
Treat the code as if you are writing to explain to a child - every letter counts!

So, either change the code, or change the layer you are using in the LSW.

The layer name used by the LVS rules should match exactly what is in the techfile...
Through experience, I've made a point never to assume that M1 = Metal1, M2 = Metal2, etc.
That's how I have learned debugging the rules.

Best regards,
I-FAB
 
Last edited:
Thanks for your help. I found a bug.
 

Hi Alekcei,
I have the same problem as yours. How did you fix the unbound pin error?

I solved the problem by setting the dg layer for labels. :smile:
 
Last edited:

Hello,

I have the same unbound pin error during LVS.

The ...EXTRACT.rul has the code:

label( m1_text M1 )
. . .
label( m1_textt M1 )
. . .
m1_text = textToPin( "M1_CAD" type("TEXT") )
. . .
m1_textt = textToPin( "ME1" type("drawing") )

I have tried different combinations when I create the pin in the layout, like
pin layer M1 type dg, pn - label layer TEXT dg, M1 dg, M1_CAD TexT

However all these combinations turn out to unbound pins from the schematic.

What can I do?
Thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top