unary OR operation on an Array

[sandy.vb]

hello

i wanted to know how to carry out a unary OR operation on the bits of an array in VHDL, the verilog analog for which is as follows :

(|reg_1[31:0]), where reg_1 is a register of appropriate size.

thanks in advance.

 

[TA37]

or_reduce(vector)

You can either quickly code your own, see page 6 of **broken link removed** for an example, or try using the IEEE reduce_Pack package **broken link removed**

....or it looks like IEEE.std_logic_misc package has it too. http://cs.umbc.edu/~squire/download/std_logic_misc.vhdl