hcu
Advanced Member level 4
Hello all,
I am a beginner just started working on altera fpga devices . I have designed an SoC (see figure) where it has NIOS II , onchip_memory1 and onchip_memory2 ,altera DMA controller and JTAG uart targeting stratix 10 device.
I am able to do read /write data into each peripheral individually. But the thing is , i am completely unaware of how to transfer data from one peripheral to other peripheral via dma controller. I searched the dma controller document and found the control register , length register, status register , source register and destination register and found their offsets . Accordingly i have written a C code to configure all these registers (see the c code attached) for the dma controller.
please someone help me to sort out this issue.
Regards,
anil
I am a beginner just started working on altera fpga devices . I have designed an SoC (see figure) where it has NIOS II , onchip_memory1 and onchip_memory2 ,altera DMA controller and JTAG uart targeting stratix 10 device.
I am able to do read /write data into each peripheral individually. But the thing is , i am completely unaware of how to transfer data from one peripheral to other peripheral via dma controller. I searched the dma controller document and found the control register , length register, status register , source register and destination register and found their offsets . Accordingly i have written a C code to configure all these registers (see the c code attached) for the dma controller.
Code:
#include <stdio.h>
//#include <altera_avalon_dma.h>
int main()
{
alt_printf("Hello from Nios II!\n");
volatile int *avalon = 0x00000000;
volatile int *onchip1 = 0x1000000+0x500;
volatile int *onchip2 = 0x1010000;
//internal register of dma controller
volatile int *status_reg = 0x01020800;
volatile int *dma_addr_src = 0x01020804;
volatile int *dma_addr_dest = 0x01020808;
volatile int *dma_bytes = 0x0102080c;
volatile int *control_reg = 0x01020818;
int i;
int b_errors = 0;
//configuring the internal registers
status_reg = 0x0;
dma_addr_dest = 0x01010000;
dma_addr_src = 0x1000000+0x500;
dma_bytes = 0x200;
control_reg = 0x0099;
// filling data into avalon custom slave
for(i=0;i<512;i++) {
avalon[i] = i;
}
//filling data into source peripheral
for(i=0;i<512;i++) {
onchip1[i] = i*0x100+0x100;
}
alt_printf("data written to avalon slave peripheral and source peripheral\n");
alt_dcache_flush_all();
alt_icache_flush_all();
//cross checking the configuration registers of dma controller
alt_printf("b_errors = %x\n",b_errors);
alt_printf("statusreg = %x\n",status_reg);
alt_printf("readaddressreg = %x\n",dma_addr_src);
alt_printf("writeaddressreg = %x\n",dma_addr_dest);
alt_printf("dma_bytes = %x\n",dma_bytes);
alt_printf("control_reg = %x\n",control_reg);
//continous checking to see whether status register is getting high ??
while(status_reg[0] !=1){
}
//comparing data at both source and destination peripherals
for(i=0;i<512;i++) {
if(onchip2[i] != onchip1[i])
b_errors ++;
}
/* for(i=0;i<512;i++) {
alt_printf("%x\n",onchip1[i]);
}*/
alt_printf("b_errors = %x\n",b_errors);
return 0;
}please someone help me to sort out this issue.
Regards,
anil