Ultrasonic Range Finder in VHDL..plz help

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greprac

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Hi frendz I need to design an Ultrasonic range finder.
Plz help as i am an amateur wid VHDL. I am uploading the diagram and for more information plz ask me. Also it doesnt have to be very complicated.

 

Frendz dont anybdy has clue abt this project???
 

I dont see hjere rationality of using fpga here as your drawigs look like data aquisition device. Are you about asic ? Or is it student project ?
 

FPGAs can be used for the memory interface and state machine design. Also, SPI, tx and rx interfaces can also be included inside FPGA. so, you just need three major chips for this project: CPU, FPGA and MEM.

Anything more specific?
 

yet add front end , time varable gain , output stage , dac, adc . I guess author is doing serious project . If not i would advice him to Devantech's SRF toys for reference design.
 

No I dont have to put it on FPGA....jus code this in VHDL...but am nt getting how to design a chirp generator and FSM. the description for FSM is as follow


 

Does anybdy have idea abt vhdl code of this statemachine
 

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