kemalkemal
Member level 1
Hi;
I am using MPLABX, PIC18f2520 and assembler. I have 2 PIC182520 talking to each other with SPI. Master PIC gets data from UART module. Then transmit the same data through SPI module to Slave PIC. Slave PIC gets that data and then transmit it through UART.
Initially instead of sensor I use a serialport program (realterm) both at the begining and end of the transmission line to emulate hardware and software. Whenever i send a data i am receiving a different data.
In the datasheet of PIC18f2520 it is written that "Before enabling the module in SPI Slave mode, the clock line must match the proper Idle state. "
I am enabling the slave PIC's SPI module as slaveSPI at the begining of everything. So i dont check if the clock line in proper idle state. (And i didnt understand how to check and implement this "must case" ) Does this could cause an error ?
I am using MPLABX, PIC18f2520 and assembler. I have 2 PIC182520 talking to each other with SPI. Master PIC gets data from UART module. Then transmit the same data through SPI module to Slave PIC. Slave PIC gets that data and then transmit it through UART.
Initially instead of sensor I use a serialport program (realterm) both at the begining and end of the transmission line to emulate hardware and software. Whenever i send a data i am receiving a different data.
In the datasheet of PIC18f2520 it is written that "Before enabling the module in SPI Slave mode, the clock line must match the proper Idle state. "
I am enabling the slave PIC's SPI module as slaveSPI at the begining of everything. So i dont check if the clock line in proper idle state. (And i didnt understand how to check and implement this "must case" ) Does this could cause an error ?