carbon9
Member level 3
Hi all,
What is the interconnect's parasitic resistance and capacitance range (min. and max. values) for a typical VLSI process (or for a spesific process) ? Could anyone give some info or recommend a source that I can find info on this question?
With regards,
What is the interconnect's parasitic resistance and capacitance range (min. and max. values) for a typical VLSI process (or for a spesific process) ? Could anyone give some info or recommend a source that I can find info on this question?
With regards,