Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

typical values of Capacitors of BitLine and Bitline-Bar in an SRAM cell

Status
Not open for further replies.

electronics20

Full Member level 1
Full Member level 1
Joined
Apr 27, 2011
Messages
99
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Visit site
Activity points
1,888
Hi
What are the typical values of Capacitors of BitLine and Bitline Bar in a 6T conventional SRAM cell in 16nm PTM?
thanks
 

Extract/calculate/estimate the in-cell capacitance of the bit-lines incl. their row-to-row length, add the input capacitance of the wordline switches, multiply by the no. of rows, then add the I/O capacitances of sense and force bitline switches as well as the output capacitance of the precharge transistor(s).

If you can't extract from an available layout, calculate/estimate from the connection lengths. Interconnect capacitances don't scale down so much with technology nodes - s. e.g. the **broken link removed**.

For the 15nm process you can calculate with approximate values of 0.16fF/µm for M1 wires and about 0.13fF/µm for M2 wires (includes area and fringe capacitance).
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top