Hi Experts,
can anybody tell me what these layers meant? and specific requirement for TSMC library for resistor creation from layout or fab process perspective
layers: RPO , RH , RPDMY
i know that these RPO along with RH is used for salicidation (to reduce resistance), where as i see RPDMY is commonly present for both w/i and w/o salicidation.
Hi,
you can find out the information about this layer in LVS file. There it is mention that if you want to draw a poly resistor then it should contain POLY+RDUMY. This is dummy layer which define the area of poly which will be consider as resistor. I think,This will be transparent layer. If this layer is not available in your palette then you can get the information (no. of RDUMY layer) from DRC file and you can create a new layer in your pallete.
If I am wrong then please let me know.