TSMC 90nm LPHP Encounter to Virtuoso help

[gezzas525]

I’m currently using the TSMC 90nm LPHP technology library to synthesize designs, the process is as follows:
VHDL CodeRTL CompilerSynthesized VerilogEncounterGDSII Stream
I want to then be able to pull the design into virtuoso for simulation however I’ve tried various ways and can’t get the .GDS to read in correctly, the issue could be the TSMC library that I’m using or the version of Virtuoso. I do have the backend and frontend of the design kit.
Also I’m assuming I need model files for the transistors when doing spice simulations? I noticed these are not in my design kit.

I will put the error messages on here tonight but if anyone has the correct procedure then it will be a great help.

Kleo

 

[gezzas525]

Ive got the following error when importing into virtuoso, this happens for every instance.

"The referenced cell "IOA22D0" was not found. The OpenAccess design data was created for this cell without any reference. Ensure that the referenced cell exists and library is defined in the cds.lib file."

Also in the layout view it looks like all the cells are blinking white, have I missed a step?

Anyone have any ideas as to the correct procedure for loading this TSMC library correctly including which lay map files to use?

Any help will be appreciated.