Hi,
I used TSMC 65 nm technology in my design. There is a varactor which is moscap_rf. I want to use it in my design. I want to ask that what is the maximum level for Vdd in this design. I could not find it. If you can help me , I will be glad.
Thank you so much already.
Everything should be described in the PDK (Process Design Kit) documents, don't you have those .pdf files? Place one in your schematic and check its properties (press Q), maybe it is described there.