Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

TSMC 65nm floating gate

Status
Not open for further replies.
Y

yeskang

Newbie level 1
Joined
Feb 25, 2013
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,285
I'm doing layout using TSMC 65nm.
I'm designing current mirror. And to increase accuracy, I wanna add two dummy gate in mirror's edge. When i run drc, it cause "floating gate" error......OTL... What should i do?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top