Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

tsmc .18um cmos breakdown vlotage

Status
Not open for further replies.

berryfan

Member level 2
Joined
Jul 10, 2007
Messages
51
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,603
using TSMC .18um process,can I use 3.3V voltage ?eg.nmos:vds,vgs,vgd,vgb,vdb those voltage can be 3.6V?my nmos length can be large than 0.18um(for example 1u or 0.35um)
thanks all
 

0.18um will be your gate width only , so for sure the nmos lenght exceeds 0.18
 

berryfan said:
using TSMC .18um process,can I use 3.3V voltage ?eg.nmos:vds,vgs,vgd,vgb,vdb those voltage can be 3.6V?
See your PDK. If you have 3.3V transistors in your lib, they also can stand 3.6V .

berryfan said:
my nmos length can be large than 0.18um(for example 1u or 0.35um)
Of course: Both the lengths and the widths can be larger.

natryx said:
0.18um will be your gate width only , so for sure the nmos lenght exceeds 0.18
0.18um will be your minimum gate length.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top