Trouble with 300W Full Bridge SMPS at 10-36Vin, 32Vout, 300W

[cupoftea]

Hi,
The attached LTspice sim and PDF schem, is a 300W Full Bridge with current doubler output and Synchronous rectifiers.
Vout = 32V, Pout = 300W, Vin = 10-36Vdc, F(sw) = 125kHz, Output inductor frequency is 250kHz.
The transformer turns ratio needs to be Ns/Np = 9:1.

As such, when Vin is at 36V, the V(reflected) to the secondary is 324V, and on top of that, AYK, the output diodes suffer the leakage inductance voltage spike.

The Vds ringing due to the leakage inductance, and high voltage on the sec diodes, means that this SMPS cannot be used with synch Rect FETs….however, with an Active Capacitor Snubber (as shown), its possible to damp the Vds ringing and indeed , allow synch Rect FETs to be used…..but only ones with sufficiently low Cds.

The trouble is the amount of auxiliary circuitry that’s necessitated (as shown)….the Active Capacitor Snubber means that huge 200A spike currents are seen in the primary FETs at start up…therefore, the Active Capacitor has to be pre-charged with a dual cascaded boost converter (as shown). Also, the Active Capacitor Snubber needs the shown flyback converter to constantly switch the energy building up in the Active Capacitor to the output of the Full Bridge.

The other advantage is that if we wish, we can do away with the Synch Rects and just use a couple of 600V SiC diodes in parallel instead of the Synch Rects……since the diodes are well snubbed, we can get away with 600V SiC’s without worry. SiC’s share current so no trouble there either.

The problem is the Dual cascaded boost, …..ie, we really need a controller with two overcurrent sense inputs for it, but a long search shows there are none.

Do you know of any?

 

[Easy peasy]

Some things in your post are non sequitur :

"The attached LTspice sim and PDF schem, is a 300W Full Bridge with current doubler output and Synchronous rectifiers. Vout = 32V, Pout = 300W, Vin = 10-36Vdc, F(sw) = 125kHz, Output inductor frequency is 250kHz.
The transformer turns ratio needs to be Ns/Np = 9:1. "

As such, when Vin is at 36V, the V(reflected) to the secondary is 324V, and on top of that, AYK, the output diodes suffer the leakage inductance voltage spike."

For 32V out at 10V in the turns ratio need only be 1 : 4 ( actually 3.2 with low losses ) for a FW rect, and hence only 1+1 : 7 ( actually 6.4 with no losses ) for a current doubler.

also, regarding your :
" F(sw) = 125kHz, Output inductor frequency is 250kHz. "

For a current doubler output ( 1st line of your post ) the output inductors see 125kHz, not 250kHz.

I would suggest a 70kHz approach for ease of snubbing etc.

--- Updated Dec 27, 2022 ---

OK - what you really need is a resonant push-pull ( if you can't have a full bridge on the pri side ).

Augment the sec side leakage with some additional L, ( or 2 L's, one on each output of the Tx ) then add a resonant C in series with this, now you can full wave rectify this output ( single o/p wdg on Tx ) into an output cap with no main output smoothing inductor - as the currents are now haversine and inductive into the output cap.

This provides efficient power transfer with no snubbing required on the diodes.

The pri current will now be haversine also ( + Imag ramp ) - so at full power the fets will be turning off a low current at design frequency - say 125kHz, you can reduce the pwm AND take the freq up for lower power out, and/or for higher voltages in - the power in the fet turn off snubbers is now reduced - as turn off current is always low.

Peak curr mode will not work with haversine currents - so either voltage mode - or ave curr mode of Iout.

--- Updated Dec 27, 2022 ---

NB: the total Lleak-sec & the series cap need to be resonant at ~ 125kHz, and the series res cap needs to be able to handle full current, also check the voltages across "L" and C at resonance and adjust ratio to keep the caps volts ( peak ) to a reasonable level.

--- Updated Dec 27, 2022 ---

--- Updated Dec 27, 2022 ---

 

[Easy peasy]

Upon mature reflection, it would seem that a boost converter up to 38V would be the best approach - as it gives a nice constant input current ( and constant Vout )

Followed by the push pull set up for 49% duty cycle and no Lout. This can then provide soft switching for both the fets and the diodes - with the regulation done via the booster. Caps across the fets needed for ZVS and some serious zeners to allow a 50mS soft start - charging up Vout caps.

The C-tapped Tx can then be used for the Vout, to reduce the diode dissipation to one diode drop.

Here the Lleak aids ZVS

--- Updated Dec 27, 2022 ---

Fixed duty cycle push pull:

--- Updated Dec 27, 2022 ---

Full load:

--- Updated Dec 27, 2022 ---

100 ohm load:

--- Updated Dec 27, 2022 ---

Of course a full bridge drive @ fixed duty cycle would be even better - no catch system needed.

 

[cupoftea]

Thanks, this looks like a great solution. As you know, it adds a Boost converter at the front end. Thing is, it makes me wonder if the Active Snubber circuit, and snubber capacitor pre-charge circuit, (of the top post) would end up with a lower component count solution than that.?
May i please ask, Was the Active Snubber and Snubber capaccitor pre-charge circuit of the top post really that bad (if thats what you are implying)?

 

[cupoftea]

Was just wondering, if i take out the synchronous rectifier FETs, and just use pllel SiC secondary diodes instead , then it starts to look far less overcrowded, as attached...do you think this could be the optimal solution?
(..it still uses the Active capacitive snubber with snubber Capacitor pre-charge)