Pictou
Member level 1
- Joined
- Mar 19, 2013
- Messages
- 34
- Helped
- 5
- Reputation
- 14
- Reaction score
- 5
- Trophy points
- 1,288
- Activity points
- 1,570
Hello,
I'm having some trouble understanding this schematic : **broken link removed**
It's a curcuit from the article named : High-Performance Crystal Oscillator Circuits : Theory and Application, written by ERIC A. VITTOZ, MARC G.R. DEGRAUWE and SERGE BITZ. From the forum rules, I understood that we can't link IEEE articles. You may need more information, if so, tell me which part.
Okay, so far what I managed to understand :
First stage : The Oscillator itself.
The crystal will be connected to Q1 and Q2. C1 and C2 are the load capacitors for the crystal.
Transistor M1 is the inverter amplifier (common source).
Transistor M7 is in weak inversion, so it's a resistor and it will force the transistor M1 to work in its high gain region.
Transistors M15-19-10 are here to bias the circuit and to give the voltage threshold for M7.
My question for the first stage is : What is the purpose of capacitor C6 on the gate of M1?
-----------------------------------------------------------------
Second stage : Amplitude regulator
The article says (and I agree) :
Transistor M37 and M39 are in weak inversion (high resistance value) and they are biased by M7 and M9.
When there is no oscillation, the regulator behaves as a current reference which delivers a start-up current to the oscillator.
I0 = A * (Vt/R7) * ln(K)
Vt = kT/q
K is the low current gain of loop M3-M6 (it must be a geometry ratio), A is the ratio of mirror M6 and M2 (must be a geometry ratio too).
The part that I don't agree with is the following :
Okay, I0 comes from M2-M6 (current mirror), what does M3 have to do with it?.
I think that M3 controls the voltage gate of M5, therefore Vgs(of M5) decreases so there is less current(I guess?).
Second problem is : There is a capacitor C7 on the gate of M3, if the oscillation grows, aren't we just supposed to extract the DC component only? so why the current decreases if the oscillation grows? (as we are just extracting the DC component of the ouput of the crystal).
Third problem : Why are there so many capacitors everywhere? (C7, C11, C5, C4).
----------------------------------------------------------------------
Third stage : Output voltage regulator
I don't even know where is the input.... from the article output is VR.
The article says :
It says the input pair, but this input is linked to what? the output of the previous stage? how is it connected to it? (or maybe it doesn't have an input signal, I really have no idea).
M33-M35 look like some kind of differential pair, why is it in weak inversion? what does it change?
And what is the purpose of C15?
-----------------------------------------------------------------------
I'm stuck on this for a while, if you need more detail just tell me in which part.
Thank you very much for your help.
I'm having some trouble understanding this schematic : **broken link removed**
It's a curcuit from the article named : High-Performance Crystal Oscillator Circuits : Theory and Application, written by ERIC A. VITTOZ, MARC G.R. DEGRAUWE and SERGE BITZ. From the forum rules, I understood that we can't link IEEE articles. You may need more information, if so, tell me which part.
Okay, so far what I managed to understand :
First stage : The Oscillator itself.
The crystal will be connected to Q1 and Q2. C1 and C2 are the load capacitors for the crystal.
Transistor M1 is the inverter amplifier (common source).
Transistor M7 is in weak inversion, so it's a resistor and it will force the transistor M1 to work in its high gain region.
Transistors M15-19-10 are here to bias the circuit and to give the voltage threshold for M7.
My question for the first stage is : What is the purpose of capacitor C6 on the gate of M1?
-----------------------------------------------------------------
Second stage : Amplitude regulator
The article says (and I agree) :
Transistor M37 and M39 are in weak inversion (high resistance value) and they are biased by M7 and M9.
When there is no oscillation, the regulator behaves as a current reference which delivers a start-up current to the oscillator.
I0 = A * (Vt/R7) * ln(K)
Vt = kT/q
K is the low current gain of loop M3-M6 (it must be a geometry ratio), A is the ratio of mirror M6 and M2 (must be a geometry ratio too).
The part that I don't agree with is the following :
Okay, I0 comes from M2-M6 (current mirror), what does M3 have to do with it?.
I think that M3 controls the voltage gate of M5, therefore Vgs(of M5) decreases so there is less current(I guess?).
Second problem is : There is a capacitor C7 on the gate of M3, if the oscillation grows, aren't we just supposed to extract the DC component only? so why the current decreases if the oscillation grows? (as we are just extracting the DC component of the ouput of the crystal).
Third problem : Why are there so many capacitors everywhere? (C7, C11, C5, C4).
----------------------------------------------------------------------
Third stage : Output voltage regulator
I don't even know where is the input.... from the article output is VR.
The article says :
It says the input pair, but this input is linked to what? the output of the previous stage? how is it connected to it? (or maybe it doesn't have an input signal, I really have no idea).
M33-M35 look like some kind of differential pair, why is it in weak inversion? what does it change?
And what is the purpose of C15?
-----------------------------------------------------------------------
I'm stuck on this for a while, if you need more detail just tell me in which part.
Thank you very much for your help.
