Trigger Signal in VHDL

Status
Not open for further replies.
N

nizdom

Member level 2
Joined
Feb 21, 2016
Messages
42
Helped
0
Reputation
0
Reaction score
0
Trophy points
6
Activity points
358
Hello guys! I think this is a basic question but I hope you can help me.

For example, I have a signal DONE that will be high for a certain time for 1 clock cycle. How can I create a signal that is same with DONE and will occur exactly after DONE and also 1 clock cycle. Thank you.
 

a delayed version of the DONE in the following clock cycle just requires a register (flip-flop) on the DONE signal producing an output that is exactly the same but delayed a single clock cycle.

Based on this and other questions you should focus on learning logic design first. You don't seem to have a firm grasp on the fundamentals of digital design.
 

If I implement the code, TSS_TRIGGER is just the same with TSS_DONE during the clock cycle. TSS_DONE gets high only for one clock cycle and then goes back to zero. What I want to happen is when TSS_DONE gets high for a clock cycle, on the next clock cycle, a signal will get high for that clock cycle (TSS_DONE is low already). So it's like I'll get a copy of TSS_DONE but with a dealy of one clock cyle. But the code below only copies TSS_DONE. They are both high at the same clock cycle.

Code: 
TRIGGER0: PROCESS(CLK)
	BEGIN
	IF(CLK'EVENT AND CLK='1')THEN
		--IF (TSS_DONE = '1') THEN
			TSS2_TRIGGER <= TSS_DONE;	
		--END IF;
	END IF;
	END PROCESS TRIGGER0;
 

No - TSS2_TRIGGER will be a 1 clock delayed version of TSS_DONE.
 

Hi,

I´m not familiar with VHDL.
But I wonder if ever TSS2_TRIGGER can become '0' after it was set to '1'?

For a one clock_cycle_delay id expect this code:
Code: 
TRIGGER0: PROCESS(CLK)
	BEGIN
	IF(CLK'EVENT AND CLK='1')THEN
		TSS2_TRIGGER <= TSS_DONE;	
	END IF;
	END PROCESS TRIGGER0;



Klaus
 

KlausST said:
But I wonder if ever TSS2_TRIGGER can become '0' after it was set to '1'?
Click to expand...

Yes it can, because the enable signal is commented out.
But you are correct, with fully uncommented code, assuming TSS2_TRIGGER powers up to 0, then it is a latch.
 

Hi,

Aaah the "--" is the sign for a comment. This makes sense.

Thanks
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…