Hi,Instantiate two of them using the appropriate transceiver location constraints, use only the transmit on one of the instances (stubbing off any unused RX user interface inputs) and use only the receiver on the other instance (stubbing of all the TX user interface inputs).
Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 smpte_sdi SDIRX ( // Edit this line to instance the name of the core as generated by CORE Generator .rx_rst (rx_rst | ~rx_change_done_s), .rx_usrclk (rx_usrclk), .rx_data_in (rx_rxdata), .rx_sd_data_in (rx_sd_rxdata), .rx_sd_data_strobe (rx_sd_data_strobe), .rx_frame_en (rx_frame_en), .rx_mode_en (rx_mode_en), .rx_mode (rx_mode_int), .rx_mode_hd (rx_mode_hd), .rx_mode_sd (rx_mode_sd), .rx_mode_3g (rx_mode_3g), .rx_mode_detect_en (1'b1), .rx_mode_locked (rx_mode_locked), .rx_forced_mode (2'b00), .rx_bit_rate (rx_m), .rx_t_locked (rx_t_locked), .rx_t_family (rx_t_family), .rx_t_rate (rx_t_rate), .rx_t_scan (rx_t_scan), .rx_level_b_3g (rx_level_b_3g), .rx_ce_sd (rx_ce_sd), .rx_nsp (rx_nsp), .rx_line_a (rx_line_a), .rx_a_vpid (rx_a_vpid), .rx_a_vpid_valid (rx_a_vpid_valid), .rx_b_vpid (rx_b_vpid), .rx_b_vpid_valid (rx_b_vpid_valid), .rx_crc_err_a (rx_crc_err_a), .rx_ds1a (rx_ds1a), .rx_ds2a (rx_ds2a), .rx_eav (rx_eav), .rx_sav (rx_sav), .rx_trs (rx_trs), .rx_line_b (rx_line_b), .rx_dout_rdy_3g (rx_dout_rdy_3g), .rx_crc_err_b (rx_crc_err_b), .rx_ds1b (rx_ds1b), .rx_ds2b (rx_ds2b), .rx_edh_errcnt_en (rx_edh_errcnt_en), .rx_edh_clr_errcnt (rx_edh_clr_errcnt), .rx_edh_ap (rx_edh_ap), .rx_edh_ff (rx_edh_ff), .rx_edh_anc (rx_edh_anc), .rx_edh_ap_flags (rx_edh_ap_flags), .rx_edh_ff_flags (rx_edh_ff_flags), .rx_edh_anc_flags (rx_edh_anc_flags), .rx_edh_packet_flags(rx_edh_packet_flags), .rx_edh_errcnt (rx_edh_errcnt), .tx_rst (), .tx_usrclk (), .tx_ce (), .tx_din_rdy (), .tx_mode (), .tx_level_b_3g (), .tx_insert_crc (), .tx_insert_ln (), .tx_insert_edh (), .tx_insert_vpid (), .tx_overwrite_vpid (), .tx_video_a_y_in (), .tx_video_a_c_in (), .tx_video_b_y_in (), .tx_video_b_c_in (), .tx_line_a (), .tx_line_b (), .tx_vpid_byte1 (), .tx_vpid_byte2 (), .tx_vpid_byte3 (), .tx_vpid_byte4a (), .tx_vpid_byte4b (), .tx_vpid_line_f1 (), .tx_vpid_line_f2 (), .tx_vpid_line_f2_en (), .tx_ds1a_out (), .tx_ds2a_out (), .tx_ds1b_out (), .tx_ds2b_out (), .tx_use_dsin (), .tx_ds1a_in (), .tx_ds2a_in (), .tx_ds1b_in (), .tx_ds2b_in (), .tx_sd_bitrep_bypass(), .tx_txdata (), .tx_ce_align_err ()); smpte_sdi SDITX ( // Edit this line to instance the name of the core as generated by CORE Generator .rx_rst (), .rx_usrclk (), .rx_data_in (), .rx_sd_data_in (), .rx_sd_data_strobe (), .rx_frame_en (), .rx_mode_en (), .rx_mode (), .rx_mode_hd (), .rx_mode_sd (), .rx_mode_3g (), .rx_mode_detect_en (), .rx_mode_locked (), .rx_forced_mode (), .rx_bit_rate (), .rx_t_locked (), .rx_t_family (), .rx_t_rate (), .rx_t_scan (), .rx_level_b_3g (), .rx_ce_sd (), .rx_nsp (), .rx_line_a (), .rx_a_vpid (), .rx_a_vpid_valid (), .rx_b_vpid (), .rx_b_vpid_valid (), .rx_crc_err_a (), .rx_ds1a (), .rx_ds2a (), .rx_eav (), .rx_sav (), .rx_trs (), .rx_line_b (), .rx_dout_rdy_3g (), .rx_crc_err_b (), .rx_ds1b (), .rx_ds2b (), .rx_edh_errcnt_en (), .rx_edh_clr_errcnt (), .rx_edh_ap (), .rx_edh_ff (), .rx_edh_anc (), .rx_edh_ap_flags (), .rx_edh_ff_flags (), .rx_edh_anc_flags (), .rx_edh_packet_flags(), .rx_edh_errcnt (), .tx_rst (tx_rst), .tx_usrclk (tx_usrclk), .tx_ce (tx_ce), .tx_din_rdy (tx_din_rdy), .tx_mode (tx_mode), .tx_level_b_3g (tx_level_b_3g), .tx_insert_crc (tx_insert_crc), .tx_insert_ln (tx_insert_ln), .tx_insert_edh (tx_insert_edh), .tx_insert_vpid (tx_insert_vpid), .tx_overwrite_vpid (tx_overwrite_vpid), .tx_video_a_y_in (tx_video_a_y_in), .tx_video_a_c_in (tx_video_a_c_in), .tx_video_b_y_in (tx_video_b_y_in), .tx_video_b_c_in (tx_video_b_c_in), .tx_line_a (tx_line_a), .tx_line_b (tx_line_b), .tx_vpid_byte1 (tx_vpid_byte1), .tx_vpid_byte2 (tx_vpid_byte2), .tx_vpid_byte3 (tx_vpid_byte3), .tx_vpid_byte4a (tx_vpid_byte4a), .tx_vpid_byte4b (tx_vpid_byte4b), .tx_vpid_line_f1 (tx_vpid_line_f1), .tx_vpid_line_f2 (tx_vpid_line_f2), .tx_vpid_line_f2_en (tx_vpid_line_f2_en), .tx_ds1a_out (tx_ds1a_out), .tx_ds2a_out (tx_ds2a_out), .tx_ds1b_out (tx_ds1b_out), .tx_ds2b_out (tx_ds2b_out), .tx_use_dsin (tx_use_dsin), .tx_ds1a_in (tx_ds1a_in), .tx_ds2a_in (tx_ds2a_in), .tx_ds1b_in (tx_ds1b_in), .tx_ds2b_in (tx_ds2b_in), .tx_sd_bitrep_bypass(1'b0), .tx_txdata (tx_txdata), .tx_ce_align_err (tx_ce_align_err));
Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 //------------------------------------------------------------------------------ // GTX transceiver // k7gtx_sdi_wrapper_GT #( .GT_SIM_GTRESET_SPEEDUP ("FALSE")) GTX_i ( .cpllfbclklost_out (), .cplllock_out (cplllock_int), .cplllockdetclk_in (clk), .cpllrefclklost_out (), .cpllreset_in (cpllreset), .gtgrefclk_in (cpll_grefclk), .gtnorthrefclk0_in (cpll_north0), .gtnorthrefclk1_in (cpll_north1), .gtrefclk0_in (cpll_refclk0), .gtrefclk1_in (cpll_refclk1), .gtsouthrefclk0_in (cpll_south0), .gtsouthrefclk1_in (cpll_south1), .drpaddr_in (drpaddr), .drpclk_in (drpclk), .drpdi_in (drpdi), .drpdo_out (), .drpen_in (drpen), .drprdy_out (drprdy), .drpwe_in (drpwe), .qpllclk_in (qpllclk), .qpllrefclk_in (qpllrefclk), .txsysclksel_in (tx_sysclksel), .dmonitorout_out (), .loopback_in (3'b000), .rxrate_in (rx_rate), .eyescanreset_in (1'b0), .rxuserrdy_in (rx_userrdy), .eyescandataerror_out (), .eyescantrigger_in (1'b0), .rxcdrhold_in (rx_cdrhold), .rxusrclk_in (rx_usrclk), .rxusrclk2_in (rx_usrclk), .rxdata_out (rx_rxdata), [B] .gtxrxp_in (rxp), .gtxrxn_in (rxn),[/B] .rxbufreset_in (1'b0), .rxbufstatus_out (), .rxlpmhfhold_in (1'b0), .rxlpmlfhold_in (1'b0), .rxdfelpmreset_in (1'b0), .rxmonitorout_out (), .rxmonitorsel_in (2'b00), .rxratedone_out (), .rxoutclk_out (rx_outclk), .gtrxreset_in (rx_gtrxreset), .rxpmareset_in (1'b0), .rxresetdone_out (rx_resetdone), .txpostcursor_in (5'b00000), .txprecursor_in (5'b00000), .gttxreset_in (tx_gttxreset), .txuserrdy_in (tx_userrdy), .txusrclk_in (tx_usrclk), .txusrclk2_in (tx_usrclk), .txrate_in (tx_rate), .txbufstatus_out (tx_bufstatus), .txdiffctrl_in (4'b1000), .txdata_in (tx_txdata), [B] .gtxtxn_out (txn), .gtxtxp_out (txp),[/B] .txoutclk_out (tx_outclk), .txoutclkfabric_out (), .txoutclkpcs_out (), .txratedone_out (tx_ratedone), .txpcsreset_in (tx_bufstatus[1]), .txpmareset_in (1'b0), .txresetdone_out (tx_resetdone) );
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?