top module to internal module!

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romikot

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HI
I wrote a vhdl memmory controller for my external cellram( all working fine)
Now i want to use this controller in a larger design and want to put this controller under another module !
Basicly i can do it with a regular inputs and outputs with a regular mapping,
from one componnet to another or directly to the outputs(although its a lot of work)!
But what do i do with an inout???
Inout can be used only in a top module!!
???
thanks
 

Convert top file into verilog That is the easiest way to solve.
 

the two methods:
1.) just pass the inout port down through the hierarchy. new tools can pick this up unless partitions are used.
2.) create three ports -- port_o, port_i, port_t, then add the port_i <= port; port <='Z' when port_t = '1' else port_o; lines to the code.
 

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