Is there a circuit able to measure the delay between 2 pulses ?
The two input signals comes from 2 clocks having the same frequency f and the delay d is supposed to be very small compared to f (d<<f). For instance, my Idea is to convert this difference in phase into a voltage.
Do you know any circuit doing that ?
Hi safwatonline,
Thanks for the prompt reply.
You proposed the PFD and CP as a solution. The Idea is ok but there is a problem. Actually I got this Idea in mind with a Filter in order to convert this phase difference into a Voltage like inside a PLL. Given that the phase is always constant the CP will constantly Charge (or discharge) the filter.
Maybe this technique can work if I use only one pulse of each clock to measue the delay however here another problem arise. let say the delay is 1/(Frequency*10). Since the frequency is high the delay will be small. As solution I have to use whether a High current or small capacitances to charge the filter's capacitance during this short perid.
You know there is a leakage in the capacitance so the question become how to maintain this voltage constant ?
Thanks, but this does not work in my case. I said that delay D is too smal compared to clock period. If I adopt this technique I'll be obliged to use a extremely high speed clock signal to synch the counter (at least let say 4/D).
Look. Let say the two signals are 2 GHz and that the delay is 1/(10*2Gh)=50ps so we'll need a 80 GHz clock signal for counting !!!
Your Idea is ok but not applicaple for small phase measurement.
I would use one pulse to set, and the other pulse to reset, and SR flip flop. Then I would R-C lowpass filter the flip flop output Q, and use the DC value across the capacitor that is proportional to the delay between the two pulses.
There are other circuits, such as a ramp generator triggered by pulse 1, and sample and hold the ramp triggered by pulse 2, then reset the ramp generator. etc.
I would use one pulse to set, and the other pulse to reset, and SR flip flop. Then I would R-C lowpass filter the flip flop output Q, and use the DC value across the capacitor that is proportional to the delay between the two pulses.
This ressemble to the PFD/CP+filter that I mensionned. I'm sure that this technique can give good result and I'm going in that direction.
Suppose that the circuit received two pulses: the first charges the filter the second stops charging it. So we got a certain Voltage let say 1.2 V. With time this voltage will decrease due to the leakage in the filter/CP that's why I need another circuit ( a kind of anlaog memory) that permit to memorise by maintaining the 1.2 V stable.
you said they were "clocks", so I assumed they were repetitive waveforms. As such, you choose the R-C lowpass to not droop much between each pulse train pair event.
Otherwise, use a sample and hold, which can have different attack and decay times.
you said they were "clocks", so I assumed they were repetitive waveforms. As such, you choose the R-C lowpass to not droop much between each pulse train pair event.
Otherwise, use a sample and hold, which can have different attack and decay times.
but in your solution you have to find time to voltage function to know phase shift (ala time difference) from measured voltage. Moreover, capacitors don't have accurate value (sometimes +-20%). In my solution you measure exactly phase shift in time
And Capture/Compare units implemented in almost every good CPU are designed exactly for these application.
but in your solution you have to find time to voltage function to know phase shift (ala time difference) from measured voltage. Moreover, capacitors don't have accurate value (sometimes +-20%). In my solution you measure exactly phase shift in time
And Capture/Compare units implemented in almost every good CPU are designed exactly for these application.