sandusty
Member level 5
tie high cell
We used logic constants in the RTL, so there will have some internal nodes tie up to logic "H' or "L". Astro could use "Tie-High Cell"s or "Tie-Low Cell"s to make the connections.
Is there anyone could tell me reasons why we do NOT connect those signals directly to the Vdd / VSS? What's the purpose of those Tie-H/L Cells? Is there any suggestions on using Tie-H/L Cells (in back end)?
We used logic constants in the RTL, so there will have some internal nodes tie up to logic "H' or "L". Astro could use "Tie-High Cell"s or "Tie-Low Cell"s to make the connections.
Is there anyone could tell me reasons why we do NOT connect those signals directly to the Vdd / VSS? What's the purpose of those Tie-H/L Cells? Is there any suggestions on using Tie-H/L Cells (in back end)?