why matching of Vt so necessary between NMOS and PMOS in analog design???? shouldnt there characcterstic depend only on their overdrive volatges??? so even if Vt's are different it can be taken care by increasing overdrive volatge......if aby good study material on this topic plz post it....
I just wondering how to match Vth's in layout/circuit level? To my knowledge, all the circuit designer can do is to reduce the effect of Vth variation.
You can use some layout techniques to match Vth such as interdigitized structure(cancel linear error in X or Y direction), cross-coupled structure(cancel linear error in both X and Y direction).
In some special analog block design,i.e. DAC, special method are used such as
Q²-Random Walk Switching, Dynamic Element Matching etc.
Even you can use Bulk-Driven MOS transistors because Vth has little effect on this type of MOS.
why matching of Vt so necessary between NMOS and PMOS in analog design???? shouldnt there characcterstic depend only on their overdrive volatges??? so even if Vt's are different it can be taken care by increasing overdrive volatge......if aby good study material on this topic plz post it....
In general you will not be able to match the Vt of an NMOS with the one of a PMOS. Or at least not over all process corners and operating conditions. Like somebody else mentioned..you are usually targeting matching of NMOS with NMOS and PMOS with PMOS. However, for matching in general..hmm..try 'Art of analog layout' by A.Hastings..it will give you a good start
yes absolutely, Matching should be done with Nmos with Nmos and PMOS with Pmos...
Thats what we are doing in Layouts like, 1]Interdigitised structure and 2] Common centroid structure...
and One thing, The vth matching of PMOS and Nmos may useful in Digital circuits like Inverters,,... Because , the switching point's accuracy depends on Vth of Nmos and Pmos...