I design a DAC, using current steering architecture. The base current source cell likes the picture below.
The bias voltage come from bandgap circuit. it is steady. But the VDD will have 5% to 10% fluctuation becaues of the source out of the chip. So the output current will change a lot by different VDD voltage.
How can I slove this problem? Please give me some advice. It is emergency!!
What do you mean by "The bias voltage come from bandgap circuit." -> Is is connected directly to VBG ? If yes, this is not the way it should be done. The bias voltage should be generated by a current mirror (the simpler solution is a transistor connected as a diode).
The current that goes to that diode connected transistor may be defined by the VBG and by a resistor.
If Vbias is kept constant with respect to Vdd, not with respect to GND, then your current will be constant and the DAC will work properly even with large Vdd variations.
So, use a precision series reference connected between Vdd and Vbias.
What do you mean by "The bias voltage come from bandgap circuit." -> Is is connected directly to VBG ? If yes, this is not the way it should be done. The bias voltage should be generated by a current mirror (the simpler solution is a transistor connected as a diode).
The current that goes to that diode connected transistor may be defined by the VBG and by a resistor.
I do not understand your solution. Even the voltage come from bandgap circuit do
not connect to 'Vbias' directly. It connect to a current mirror then generate a
bias voltage. The current out of current mirror also respect to (VDD-VBG) that is
Vgs. When the VDD has variations the output of current mirror will change too.
Could you give me a circuit to explain your solution, thanks a lot.
And to my design, it is a voltage bias circuit, not crrent bias. I use Vgs to
generate current. I can not find out a way can make the Vgs constant, it is the
main problem.
I design a DAC, using current steering architecture. The base current source cell likes the picture below.
The bias voltage come from bandgap circuit. it is steady. But the VDD will have 5% to 10% fluctuation becaues of the source out of the chip. So the output current
~~~~~~~~~~~~~~~
means what?
will change a lot by different VDD voltage.
How can I slove this problem? Please give me some advice. It is emergency!!