how to define the the RC parameter of a loop filter in a charge pll ,I use the matlab to simulate a charge pump pll,the vco output frequence is 200Mhz,the refrence frequence is 50k,can these two frequnce define the loop filter ?
for 3-order & 4-order charge pump pll, you can refer to "A cmos frequency synthesizer with an injection-locked frequency divider for a 5ghz wireless lan receiver" jssc may. 2000, for how to decide the loop filter parameters. And about you design, I have a question that why the reference frequency is so small? does this means you need a "large" divider?
thanks,this pll is used for a receiver,it is a integer pll,I dont know why it get so small Fr frequece,so it's lock time is as long as 300us.i think the receiver dont need a fast pll,I think so.
Added after 9 minutes:
what is the problem about the small reference frequence ?
the main problem with small reference , u need large divider
also when using small refernce u will need the bamdwidth of the PLL should be 1/10 of the reference frequncy so the pll will be slow , and the phsae noise if the VCO will not be cleaned , u need VCO with high Q tank circuit
the connection of the bandwidth and speed of locking , is the as bandwidth increase the natural frequncy of the system increase this mean the system dynamic response is fast ,
about the bandwidth and phase noise
the loop transfer funcation of refernce oscillator is a low pass filter so the loop clean the refernce oscillator as the bandwidth decrease
but the loop transfer funcation for the VCO phase noise is high pass filter so as the loop bandwidth increase the cuttof frequncy of the high pass filter increase also and this clean the phase noise of the VCO