l.kim
Newbie level 1
Hi,
For the schematic, use a 5V pmos & nmos device with a parasitic diode. However, when layout, the sub-block uses a basic 5V device with no parasitic diode, because it shares the guard ring at the top level with other blocks. Is there a way to complete the LVS without drawing the guard ring on the sub-block when LVS verifying the sub-blocks?
Verify Tool: Assura
Thanks.
For the schematic, use a 5V pmos & nmos device with a parasitic diode. However, when layout, the sub-block uses a basic 5V device with no parasitic diode, because it shares the guard ring at the top level with other blocks. Is there a way to complete the LVS without drawing the guard ring on the sub-block when LVS verifying the sub-blocks?
Verify Tool: Assura
Thanks.