the answer is no,
because the current output carry signal is only depend on the current input data, it has no relation with the carry signal of the privious level, (maybe you can write out the logic express to check)
that is, the delay of 4-2 compressor is almost independ with the width of the 4-2 compressor. for example, the delay of 32-bit 4-2 compressor and the delay of 16-bit 4-2 compressor are almost the same.
while for carry ripple adder, the delay is depend on the width
that is why we use 4-2 compressor when design multimplier
Added after 6 minutes:
by the way, the logic expression of 4-2 compressor is not only one kind, there are many implemention method, the key is the output carry is only depend on the inpout data, and has nothing to do with the carry of the privious level,