May 26, 2003 #1 L lvwx Newbie level 2 Joined May 23, 2003 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 26 I have 2 questions to ask for help : 1.Can Xilinx virtex2 FPGA accept 250MHz clock? 2.Can Xilinx virtex2 FPGA output 250MHz clock signal from IOBs?
I have 2 questions to ask for help : 1.Can Xilinx virtex2 FPGA accept 250MHz clock? 2.Can Xilinx virtex2 FPGA output 250MHz clock signal from IOBs?
May 26, 2003 #2 T tlp71@hotmail.com Full Member level 4 Joined May 14, 2002 Messages 220 Helped 6 Reputation 12 Reaction score 2 Trophy points 1,298 Activity points 1,596 i think that if you read the datasheet you can find this info. If you would use a 250 mhz internally i think that is possible but very hard. Bye. G.
i think that if you read the datasheet you can find this info. If you would use a 250 mhz internally i think that is possible but very hard. Bye. G.
May 27, 2003 #3 L leon Junior Member level 1 Joined May 20, 2003 Messages 17 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 430 You can use 250M clk in vertix2p. But it is very hard. Maybe the floorplan should be done manully. For output 250M clk, you can see the PLL's descirpt in datasheet.
You can use 250M clk in vertix2p. But it is very hard. Maybe the floorplan should be done manully. For output 250M clk, you can see the PLL's descirpt in datasheet.