Verifying SDRAM
At 50 MHz, I didn't think I would have any problems like this, that's why I'm not convinced it's hardware... but I don't know how to go about debugging a problem like this other than testing the DRAM using the above methods.
I couldn't completely understand your post, but it seems like you are referring to using multiple clocks.. I'm not sure how this would solve anything, but this would only be applicable for RTL, right? My "code" is C-code for a NIOS processor, not RTL, so I'm not sure how this would help me.
It *could* make sense how inserting C-code would increase the delays, making the system work, but again, at 50 Mhz, it's already quite slow... and this is someone elses TCP/IP stack (light-weight IP), so the code has been proven before.