best vhdl compiler simulator
The meaning "industry standard simulator" is nonsence.
Any VHDL simulator is standard one
because VHDL is standard, IEEE libraries are standards, gate model libraries
have to be equal in any simulator.
Any simulator has to provide equal results for equal input dates and programs.
Another simulator is bad simulator and is not worth to be selled.
From this point of view ModelSim and ActiveHDL, and many others
are equal industry standard simulators.
Another questions are
convinience,
designer productivity (project input, bug finding, etc)
modeling speed,
cost, support, etc.
Due to the convinience and designer productivity
I have selected Active HDL.
Some people select American mashine gun, some people select Russian one.
But they do the some result.