elliot_cai
Newbie level 4
The power start sequence been showed in PIC, how can I protect my chip if the sequence run mistake?
Like the PIC show, the sequence is VCC-VEE-VGG when the power up and reversed when the power down, I want insure that when the sequence wrong, the chip don't work. How can I design the internal circuits?
Like the PIC show, the sequence is VCC-VEE-VGG when the power up and reversed when the power down, I want insure that when the sequence wrong, the chip don't work. How can I design the internal circuits?