LtSpice has a pretty strong behavioral language behind the front panel but not well documented to the public. You might find some hints about mapping veriloga to "B sources", "A sources" and passives if there is not a direct code to code way.
I don't know what a TFET is, who makes them or how many different kinds may exist. But often you can chase down scholarly papers from early research, and find how they -got to- the model and maybe even a listing (especially if they were among the first to make and model, they will be proud to publish.
Follow the raw Google-barf-river to it's headwaters and who knows?