target and link library

[nishi123]

I am learning to use dc_shell for synthesizing
Currently I am trying to understand why I have to set a link_library and what is the difference between link_library and target_library.
To understand what the tool does when I set a link_library, I synthesized the same design twice.

First without setting the link_library
In second one, I used the same library as link_library as target_library. No asterisk (*) or other .db files.

The first try returned the following error –
Error: Cannot find the specified driving cell in memory. (UID-993)

Now I have used only one sample library as link_library and target_library, and it does contain the driving cell I specified in the .sdc file.
My questions are –
1. If I have only one library to use, do I have to set both target_library AND link_library?
2. When both target and link is the same library why the tool can find the driving cell when specified as link library but cannot find when only target_library (the very same library) is specified?

 

[alam4vlsi]

Hi.

Target Library: A technology library that Design Compiler maps to during optimization. Along with the link_library and search_path variables, you need to specify the logical library that will be used for mapping/optimization.

Link Library : The technology library that contains the definition of the cells used in the mapped design. In principle should be the same as target_library unless a technology translation is being performed.

Search Path: If the library variables only specify file names, search_path is used to locate libraries. By default points to current working directory. By default, you must specify the unix-path for all files (relative or absolute). It specifies where to look for files.

 

[Nanda San]

When you're linking your design after compilation & elaboration DC uses the link library which being empty in first case Errors out.

Don't you have any StdCells that you're saying that you need only 1 lib here. Target lib will mainly comprise of StdCells . Link lib will comprise of structural models any IP that you may have in the design like Memories, PHY etc. etc. And you should also use the asterisk(*) before specifying any link lib.

~Nandasan