[SOLVED] systemc problems please help me

[u24c02]

Hi.
i made simple inverter by clock.
I trying to trace "popo_in", "popo_out". popo_in have normally transition and i checked from vcd.
But popo_out is not work(it's not having transition). what is wrong ?

Here's problems.

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Code C++ - [expand]
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#include <systemc.h>
 
class popo_clk_gen : public sc_module
{
public:
sc_out<bool> popo_out;
sc_in<bool> popo_in;
SC_HAS_PROCESS(popo_clk_gen);
void test()
            {
            int i=0;
            {
            popo_out = ~popo_in;
            }
            }
 
popo_clk_gen(sc_module_name name) : sc_module(name)
{
SC_METHOD(test);
sensitive(popo_out);
}
 
};
 
int sc_main (int, char *[]) {
sc_signal<bool> popo_out;
sc_signal<bool> popo_in;
 
sc_clock clk1("clk1",10,SC_NS);
popo_clk_gen pcg("pcg");
pcg.popo_out(popo_out);
pcg.popo_in(clk1);
 
sc_trace_file *tf = sc_create_vcd_trace_file("wave");
sc_trace(tf,clk1, "clock");
sc_trace(tf,pcg.popo_in, "in_clk");
sc_trace(tf,pcg.popo_out, "out_clk");
sc_start(50,SC_NS);
sc_close_vcd_trace_file(tf);
return 0;
    }

---

 

[kornukhin]

1. sensitive(popo_out); should be actually popo_in
2. It strange but it really doesn't work (I am using SystemCWin + BCC). Try following workaround "popo_out = popo_in ? false : true;" or "popo_out = !popo_in;"... Probably SystemC library redefines '~' operator...

 

[u24c02]

Thanks Sir. above problem was solved.

But i have another problem.
Actually, I want make the following code to systemC.

reg [3:0] c;

always@(posedge clk)
begin
c <= c + 2;
end

is that can be make to systemC?
If you can Would you please make above code to systemC?

Thanks Sir.

 

[kornukhin]

something like this:

#include <systemc.h>
   
class cnt : public sc_module
{
   public:
      sc_out<sc_int<4> > counter;
      sc_in<bool> clk;
      
      sc_int<4> tmp;
      SC_HAS_PROCESS(cnt);
      void run()
      {
         tmp = counter.read(); // read data
         tmp += 2;// increment                         
         counter.write(tmp); // write to port
      }
 
   cnt(sc_module_name name) : sc_module(name)
   {
      SC_METHOD(run);
      dont_initialize();
      sensitive_pos << clk;
   }
};
 
int sc_main (int, char *[]) {
   sc_signal<sc_int<4> > counter;
 
   sc_clock clk1("clk1",10,SC_NS);
   cnt cnt_inst("cnt_inst");
   cnt_inst.counter(counter);
   cnt_inst.clk(clk1);
 
   sc_trace_file *tf = sc_create_vcd_trace_file("wave");
   sc_trace(tf,cnt_inst.clk, "clk");
   sc_trace(tf,cnt_inst.counter, "counter");
   sc_start(100,SC_NS);
   sc_close_vcd_trace_file(tf);
   return 0;
}

 

[u24c02]

something like this:

#include <systemc.h>
   
class cnt : public sc_module
{
   public:
      sc_out<sc_int<4> > counter;
      sc_in<bool> clk;
      
      sc_int<4> tmp;
      SC_HAS_PROCESS(cnt);
      void run()
      {
         tmp = counter.read(); // read data
         tmp += 2;// increment                         
         counter.write(tmp); // write to port
      }
 
   cnt(sc_module_name name) : sc_module(name)
   {
      SC_METHOD(run);
      dont_initialize();
      sensitive_pos << clk;
   }
};
 
int sc_main (int, char *[]) {
   sc_signal<sc_int<4> > counter;
 
   sc_clock clk1("clk1",10,SC_NS);
   cnt cnt_inst("cnt_inst");
   cnt_inst.counter(counter);
   cnt_inst.clk(clk1);
 
   sc_trace_file *tf = sc_create_vcd_trace_file("wave");
   sc_trace(tf,cnt_inst.clk, "clk");
   sc_trace(tf,cnt_inst.counter, "counter");
   sc_start(100,SC_NS);
   sc_close_vcd_trace_file(tf);
   return 0;
}

I'm really Thanks i love it

 

[u24c02]

Thanks i'm really appreciate.