This seems like a very broad homework or interview question.
SystemC is a C++ library used to model hardware systems at many different levels of abstraction. A very restrictive subset of that library can be used to synthesize a description into real hardware. However, it's main purpose is to provide high-level, high-performance models of a system to get qualitative analysis of the system, and to interact with system firmware/software in advance of having the actual hardware to run on.
VHDL is a hardware description language that can also model hardware systems at many different levels of abstraction. However, it's main purpose is to model a description that can be synthesized into real hardware.
You will find each tool easy to describe, and get the best performance using the abstraction it is best at describing.