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System level design and simulation

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walker5678

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Would like to know how to do system level design and simulation, and what kind of tools are popularly used?

Thanks!
 

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Hi,
There are some HDL which makes the system level design possible. The most known are:
SystemC, SystemVerilog and recently SystemVHDL.
The tools used are Modelsim, Riviera, SystemCrafter, SystemC lib+MSVC++, ....
Hope it help !
Bye
 

leo_o2

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What's kind of system design?
 

elbadry

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It all depends on what kind of system you are up to...

For ADCs, simulink is used initially together with Matlab. Then verilogA is used as you go deeper into circuit implementation

For RF, ADS is popular. Simulink also is used.

VerilogA/AMS is a valuable tool for all of these
 

rillyxue

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for rf sys simulation, awr is very good, then is ads.
 

samuraign

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how about communication based system design.

I feel Simulink may be the best one.

Can you give your opinion.

Is it advisable to switch to C-based or SystemC based design.
 

tdf

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It seems imposible.

Nomarly, the system level verification works with macro cell, but the spice simulator works with a device (real or Idea). However, with some setup, and build a spice macro, you can run at system level by spice simulator but it is very complicated.

Some tools can support for macro cell or device, and that is a good choice for system verification.

tdf.
 

kgl_13gr

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I think the newer versions of Simulink/Matlab allow co-simulation with SPICE blocks, using e.g. spectre.
 

tdf

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Hi kgl_13gl,

I also found out that Agilent's tools can support the co-simulation.
I have no idea with simulink/Matlab.
 

gautamvsharma

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for communication system simulation, simulink is the very best tool to utilize.
 

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