Dec 15, 2009 #1 R reninroy Junior Member level 1 Joined Feb 26, 2008 Messages 18 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,389 Synthesizable designs Where i can use the wired (and/or) logic? is this logics are synthesizable in verilog HDL?
Synthesizable designs Where i can use the wired (and/or) logic? is this logics are synthesizable in verilog HDL?
Dec 15, 2009 #2 RBB Full Member level 5 Joined Jul 2, 2007 Messages 303 Helped 71 Reputation 142 Reaction score 36 Trophy points 1,308 Location USA Activity points 2,560 Synthesizable designs Wire ands/ors aren't (or shouldn't) be synthesizable.