synthesis, pnr - clock 400 Mhz and 200 Mhz in a design

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seeravi

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Hi,
Two different clock 400 Mhz and 200 Mhz in a design.
In terms SDC file:
What are things take care in Synthesis Stage?
What are things take care in PNR Stage?

What we have to specify SDC constraints files?

see the attahment

Regards,
Ravi
 

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