Aug 19, 2008 #1 T teja321 Member level 1 Joined Oct 16, 2006 Messages 37 Helped 6 Reputation 12 Reaction score 1 Trophy points 1,288 Activity points 1,483 I am working on an asic prototyping project on FPGA. We are using Synplicity Certify for the first time.. Most of the connectors and thiry party IC's having connections with the FPGA in the Board file (.vb) gets prunned while compiling the design. What can we do to make Certify not prune these connectors and IC's?? Added after 1 hours 37 minutes: Has no one used Synplicity Certify??
I am working on an asic prototyping project on FPGA. We are using Synplicity Certify for the first time.. Most of the connectors and thiry party IC's having connections with the FPGA in the Board file (.vb) gets prunned while compiling the design. What can we do to make Certify not prune these connectors and IC's?? Added after 1 hours 37 minutes: Has no one used Synplicity Certify??