teja321
Member level 1
I am working on an asic prototyping project on FPGA. We are using Synplicity Certify for the first time..
Most of the connectors and thiry party IC's having connections with the FPGA in the Board file (.vb) gets prunned while compiling the design.
What can we do to make Certify not prune these connectors and IC's??
Added after 1 hours 37 minutes:
Has no one used Synplicity Certify??
Most of the connectors and thiry party IC's having connections with the FPGA in the Board file (.vb) gets prunned while compiling the design.
What can we do to make Certify not prune these connectors and IC's??
Added after 1 hours 37 minutes:
Has no one used Synplicity Certify??