davifumi89
Newbie level 4
synopsys designware: post synthesis checking
Dear eda users,
does anyone know how to see which IP block synopsys maps to implement a given operator? I already know that depends on constraints if nothing different was explained. .. I would like to understand which adders/multipliers synopsys has chosen during logic synthesis.
thank you very much![Smile :) :)](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)
David
Dear eda users,
does anyone know how to see which IP block synopsys maps to implement a given operator? I already know that depends on constraints if nothing different was explained. .. I would like to understand which adders/multipliers synopsys has chosen during logic synthesis.
thank you very much
David