I m using 32nm V2.0 Bulk CMOS PTM model file...
vt= 26e-003; %thermal voltage%
eo= 8.854e-14; %permittivity of free space%
er= 3.9; % relative permittivity of Silicon dioxide%
toxe= 7.5e-010; %electrical oxide thickness%
eox= eo*er; %permittivity of Silicon dioxide%
cox= eox/toxe; %oxide capacitance%
esir= 11.68; % relative permittivity of Silicon%
esi= esir*eo; %permittivity of Silicon%
nch= 4.1e+018 ; %channel concentration%
ni= 1.45e+010; %intrinsic concentration%
q= 1.602e-019; %electron charge%
num= 4*esi*vt*log(nch/ni);
deno= nch*(q);
xdep= (sqrt(num/deno)); % Maximum depletion width%
cdep= esi/xdep; %depletion layer capacitance%
m= 1+(cdep/cox) %subthreshold slope factor%
I was unable to find the value of channel doping concentration in the PTM model file...So i have assumed the value (roughly extracted from the graph)..using the above mentioned mentioned values, Sub threshold slope factor is approximately around 1.But i have read few articles where they have mentioned that for bulk CMOS m is around 1.4...May i know which value has to be used for the simulation and how do i justify that?
I have attached the graph from which i have roughly extracted the Nch value...
Link for PTM model file has been attached :
http://ptm.asu.edu/latest.htmland i m using 32nm PTM model for metal gate/high-k CMOS: V2.0