James.Edward
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Hello,
Something strange happened in my post-simulation:
two cascade PMOS current sources are symmetrical in both schematic and layout, however the voltages at the same node in two branches are different.
As shown in the picture, the voltage of node A is 1mV higher than that of node B.
So the values of output VCM and VDM are wrong.
How could this happen ?
Something strange happened in my post-simulation:
two cascade PMOS current sources are symmetrical in both schematic and layout, however the voltages at the same node in two branches are different.
As shown in the picture, the voltage of node A is 1mV higher than that of node B.
So the values of output VCM and VDM are wrong.
How could this happen ?