Store data in Block RAM on FPGA

[amitgangwar_vlsi]

hi...

can anybody tell me the process to store the data in the block RAM on FPGA.???

i know that we can call Block RAM in our program.........about it is given in the xilinx language templates.........

but how???????????

plz help me if anybody know

thanks in advance

amit gangwar
amitgangwar2006@yahoo.co.in

 

[nxtech]

You can use one of two methods.

1) write the code using the Block Ram Template in the code snippet section and manually specify your block ram values.

2) Use the memory wizard to build your block ram and presepecify your block ram values.

I personally use the second option 90% of the time.

E

 

[darylz]

I'm not clear what you want to do...
I you are using RAM, difinitely you will write something into it.

 

[sohiltri]

u can iinitialise easily by callin each cell by cell.....u can store it while simulatin also again by callin the cell......please make your question clear.....i think u r gettin some error regardin ram storage ???

 

[amitgangwar_vlsi]

hello sir/mam.........

thank you for early and positive response..........

actually i am working on image processing.so through MATLAB i converted the image to matrix of binary numbers.now i want to store these binary numbers in block RAM on FPGA.so that, i can call these data in my program and can work on it.
that i want to do.................

now my problem..........
in XILINX template for calling Block RAM port map and input output is given of BRAM.........but port mapping is done outside the process....and i have to store data serially....so how can i store data serially????????......it will very lengthy process because i am using 128X128 RAM.............

can i initiliaze the RAM with any process???????????

plz tell me which process is good and which is suitable for my project??????

and how can i do each one??????????

i hope i would get positive response

many thanks in advance

amit gangwar
amitgangwar2006@yahoo.co.in

 

[echo47]

If you are using Xilinx XST, it can infer (automatically translate) an ordinary Verilog or VHDL register array into single-port or dual-port Block RAMs. For best results, follow the HDL coding guidelines in your synthesizer documentation. For Xilinx XST, this is the "RAMs and ROMs" section of the "HDL Coding Techniques" chapter of the "XST User Guide" book (xst.pdf).