akshada
Member level 3
The Cortex-M3 processor integrates an advanced Nested Vectored Interrupt Controller (NVIC)
The NVIC supports up to 240 dynamically reprioritizes interrupts each with up to 256 levels of priority
Can somebody help me understand its meaning..
thanks in advance
The NVIC supports up to 240 dynamically reprioritizes interrupts each with up to 256 levels of priority
Can somebody help me understand its meaning..
thanks in advance