Starting GPU Core design in VHDL

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3Deye

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Hi,

I've started learning VHDL to use it to design my own graphics core, I've also studied the block diagrams of different GPU core architectures from AMD and NVIDIA, also I started to study a computer graphics course and I'm now familiar with the mathematical (Matrices) operations involved in the core operations.

I decided to start with the ALU design (Stream Processors) and the Memory controller design so I could test a simple Arithmetic/Logic operations by acquiring data from the DDR2 memory included in the Virtex-5 ML506 FPGA and process it using the ALU.

My questions now, Aren't there any useful resources that could help me in designing the ALU and the MC using VHDL ? by the way, a Floating point unit is an essential part of the design, and I couldn't find some useful resources of designing it in VHDL.

Also, I found a good open source design, the OpenSPARC T2 which is based on the UltraSPARC T2, I'm interrested in this chip since its architecture is close to Intel's Larrabee (Intel's first GPU core architecture). What's your opinions guys? would it be a good start? and the most important question is, which part of the design should I start with?

Thanks in advance.
 

I would skip the GPU and Floating point as your starting project.

Implement an 8-bit micro controller or processor first. There are a number of them available out there as well as a number of books on the subject.

This will teach you data flow, data dependency and pipelining.

Why do you want to do a GPU?
 

Hi afxx, thanks for your interest.

Why do you want to do a GPU?
Actually, It's a graduation project and its thesis is as follows:
Our team is formed of 3 students and we have about 6 Months to finish it.

The most important issue for us now is how should we start the project? which parts of the design should we start with?

You suggested that we should start with a 8-bit processor first, could you please suggest some useful resources/designs to start learning and implementing it?

Also, if you were me and based on the thesis, how would you divide the project?

btw, we learned the design of the EC-1 General Purpose Microprocessor and simulated it but did not implement it on an FPGA.
https://faculty.lasierra.edu/~ehwang/digitaldesign/webpages/projects.html#EC-1
 

I know this post is more than 2 yrs old but I m posting my doubt in a hope that the members are still in touch with edaboard.

I am a graduating student and want to design BIST(Built in self test) in verilog for memory testing. The things I know till now is that I need ModelSIM & synopsys software dc_shell to do that but, don't know how could I implement these and if I also need hardware stuff to do that ? Am I write that I have to design a memory in ModelSIM ?

Please help me
 

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