Finding the correct number of layers for any design is a compromise, as is all PCB design, but with FPGA's, multiple supply voltages and high speed becomes more of a problem. There are a number of factors that determine the number of layers as follow:
1. BGA's; the first determining factor, route breakout determines the base number of layers when using BGA's. The book BGA breakout by C. Pfeil explains this in more detail. But depending on your track and gap, and via size will give you the minimum number of layers required to break out of a BGA device.
2. Power requirements; how many voltages are there, and how are they distributed. I highlight all the separate supply voltages in different colours so I can determine how to get the right voltages to the right pins. This will determine how many power layers are required. Generally each power layer will also require 0V (GND) layer, closely coupled (i.e. 0.1mm max pre-preg between these layers during manufacture) to provide sufficient plane capacitance to help signal integrity and EMC. This plane capacitance is the first line of defence against ground bounce, the de-coupling capacitors being the next in line, depending on their value and stray inductances.
3. Signal Integrity; again depending on the signal speeds, rise time etc there may be signal integrity issues, the signal may have to be of a certain impedance. This requires the signals to be closely coupled to a 0V (GND) plane or a contiguous power layer, again complicating the layer stack up. The characteristic impedance of routes is best determined in conjunction with your PCB fabricator; they use a program called Polar to determine impedances etc and will give you feed back on your stack up and any recommendations to achieve the desired results.
4. Cost; all the above requirements have to be balanced up against the expected cost of the product, adding layers puts the complexity of the board up and thus increases cost, thus depending on how cost sensitive a design is determines the compromises of the above to meet the expected cost of the board.
There are other issues, but the above cover some of the main issues with determining how many (and off what type, signal, power, gnd) layers you will require for a particular PCB design. It can be complex due to so many factors affecting the decisions.
Hope this helps, though I suspect it may raise more questions.
Marc