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standards for pcb design

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mohsentalar

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Hi everyone,
I'm using protel dxp for PCB design.
I wanna know how to design coincident to IPC standards Exactly.
is there a plug in or template or somthig like that to import these rules to protel?
how do you call a design "STANDARD" and how prove it?
I know there is IPC2221,IPC2223,...etc. but i think they are complicate and also i dont know how import ALL things in protel and be assured.
Do i have to create and check them ONE by ONE or there is other way?
thanks.
sorry for language.
 

Where to begin...
The best option would be to do the IPC CID course...
The second best is get the standards and read them...
Then you will be able to gleam the pertinent parts...
Such as supported hole pad to hole ratio etc.
There are no hard and fast rules that you can just import I am afraid, each design is different, what the standards teach you is how to cater for manufacturing and assembly tolerances when setting up your design rules and track sizes, as well as information for high voltage clearance, current capacity (IPC-2152).
Look at the IPC C-1000 set of documents and you will realise there is a lot to learn and decipher.
So do some background research then ask more focused questions on points you have issues with.
 
first thank for respond
second do you advise any site for training and learning videos for these standards?
third is there any example files in the internet?
 

I will have a look around and see what's available, the trouble is the CID courses have to be paid for so limited free information, but there are other guides... Also the IPC specification have to be bought, though they are worth getting especially if your company will pay for them.
Have a look around some of these links, for now.
 

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very very thank you
sorry for delay.
im looking for tutorials that show me how to design coincident to IPC standards and tell me reason of every details
you know, lets find how pro's getting start a project , how many layers do you need, how arrange layers, and... so on.
im looking for videos that show a project that describe detials of layout and tell the reasons.
 

BIG Questions... need to be more specific, to give an idea here is my answer to someone asking how many "layers should his design should have?"
Finding the correct number of layers for any design is a compromise, as is all PCB design, but with FPGA's, multiple supply voltages and high speed becomes more of a problem. There are a number of factors that determine the number of layers as follow:
1. BGA's; the first determining factor, route breakout determines the base number of layers when using BGA's. The book BGA breakout by C. Pfeil explains this in more detail. But depending on your track and gap, and via size will give you the minimum number of layers required to break out of a BGA device.
2. Power requirements; how many voltages are there, and how are they distributed. I highlight all the separate supply voltages in different colours so I can determine how to get the right voltages to the right pins. This will determine how many power layers are required. Generally each power layer will also require 0V (GND) layer, closely coupled (i.e. 0.1mm max pre-preg between these layers during manufacture) to provide sufficient plane capacitance to help signal integrity and EMC. This plane capacitance is the first line of defence against ground bounce, the de-coupling capacitors being the next in line, depending on their value and stray inductances.
3. Signal Integrity; again depending on the signal speeds, rise time etc there may be signal integrity issues, the signal may have to be of a certain impedance. This requires the signals to be closely coupled to a 0V (GND) plane or a contiguous power layer, again complicating the layer stack up. The characteristic impedance of routes is best determined in conjunction with your PCB fabricator; they use a program called Polar to determine impedances etc and will give you feed back on your stack up and any recommendations to achieve the desired results.
4. Cost; all the above requirements have to be balanced up against the expected cost of the product, adding layers puts the complexity of the board up and thus increases cost, thus depending on how cost sensitive a design is determines the compromises of the above to meet the expected cost of the board.
There are other issues, but the above cover some of the main issues with determining how many (and off what type, signal, power, gnd) layers you will require for a particular PCB design. It can be complex due to so many factors affecting the decisions.
Hope this helps, though I suspect it may raise more questions.
Marc
 

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