After added feedback oscillator it started to oscillate. I don't want it.
First comment, you don't necessarily need to cascade amplifiers, because the shunt has the same ground reference as the input signal. But with sufficient fast OPs, you possibly get stability problems due to the MOSFET input capacitance even with a single OP.
If you sketch the loop gain magnitude and phase of your circuit (a bode diagram), you'll see, that it can't be stable with universal (unity gain) compensated OPs. Prefereably you would add an AC feedback path from X1 ouput to inverting input. Add a series resistor at X2 output and a RC series circuit for the feedback. Adjust the resistor ratio and time constant empirically or based on a calculation.
I thought about a compensation network like this:
P.S.: I see, that ISL28191 is a fast bipolar OP. You would want to use symmetrical resistor values in the differential amplifier to avoid additional offsets created by the the bias currents.
First comment, X1 isn't working as a comparator. It's a linear amplifier in the current control loop. The loop gain magnitude and phase is determining the pulse response of the output current.If do like that, the slew rate of the current at mosfet is differ with the power source at comparator. I wish the current follow the same shape of the power source at comparator non-inverting terminal terminal ...
Most likely you didn't yet find the optimal gain setting. In addition, you'll possibly observe difficulties to drive the MOSFET gate node capacitance with the OP output impedance. A small gate series resistance (10 - 20 ohm) may improve the setting range.But i try to adjust the R and C value.. still have a very high overshoot for the current at mosfet...
Your mosfet is N-chan enhancement type. Its gate V is referenced to its source terminal (the more negative one).
You've got several components in contact with that terminal.
Some components carry signal back into the op amp which influences the op amp driving the mosfet.
Besides that, there's a resistor going to ground. This causes a certain amount of feedback effect at the mosfet gate.
I believe this is where your overshoots are coming from. A loop or two in your circuit needs to settle after the transition to high.
I don't know how to go about solving it, unless it's to use a P-channel mosfet instead. Its gate is referenced to the drain terminal (the more positive leg). However this would invert its operation.
Are you talking about the feedback loop?Some components carry signal back into the op amp which influences the op amp driving the mosfet.
Do you mean R1? What's the related "feedback" effect?Besides that, there's a resistor going to ground. This causes a certain amount of feedback effect at the mosfet gate.
Do you feel that PMOS or NMOS is better on this design? I m planning to draw about than 40A over the Rds(on) with certain duty cycle ofcause
I agree, that R1 involves an internal feedback of the output stage (current controlled voltage feedback or "series-series" feedback). It's also true, that moving the current sense resistor to the transistor drain cancels this feedback. But why should this kind of feedback cause an overshoot?This increases current through the mosfet. Etc. This process is a kind of feedback. It isn't the kind that leads to oscillations. Just a momentary ringing when the transition occurs.
Notice this feedback effect does not occur when the resistor is installed at the drain terminal of the N-mosfet (or at the collector of the NPN transistor).
There is a flaw in my suggested compensation scheme in so far, that part of the setpoint signal is transmitted to the output directly. It should be modified by adding a R - RC network to the +ve input as well. The network can be adjusted to cancel the overshoot.
Connecting the compensation network to the MOSFET gate is not reasonable in my opinion.
Unfortunately, the circuit has a current dependent gain caused by the MOSFET transconductance variation. So you can't achieve a perfect pulse response for any output current.
I agree, that R1 involves an internal feedback of the output stage (current controlled voltage feedback or "series-series" feedback). It's also true, that moving the current sense resistor to the transistor drain cancels this feedback. But why should this kind of feedback cause an overshoot?
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