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stability simulation of bandgap

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bottom_up

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Dear all
I want to design a bandgap reference circuit. Now, I have determined which structure I would choose .But I have the problem with which parameters I should simulate and how to simulate them by hsipce.
For example, how to simulate the stability of the circuit . In details, what stimulus I should add to the circuit ,and how to analyze the results.

Thanks a lot.
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JoannesPaulus

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with a transient analysis, you could ramp up the power supply and see what happens at the output voltage (over PVT).
 

snafflekid

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break the negative feedback at the output and inject an ac signal, like you do for ac analysis of amplifiers. You may need to set an initial condition for the output voltage to get it to start up, but probably won't
 

walker5678

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Use stability analysis in cadence, break the feedback loop and insert iprobe cell into the loop.
 

bottom_up

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Thanks all.
But I still have a problem is ,the amplifier used in my bandgap is self_biased. In detail ,the output of the amplifier is the input(gate voltage) of the bias mosfet. In this case ,I am puzzled with how to break the loop.

Waiting for your help.
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JoannesPaulus

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The transient method I suggested in my previous post works quite well in this case. Of course, the theory is a bit more complex and I do not really have any reference to offer. Just give it a try!
 

saro_k_82

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Transient analysis includes all non-linear effects. It is the real indicator of the system stability and easy to run. But it will not tell you the pole locations, their separation and stability margins which are required to analyze and correct the circuit stability. So run a "stb" analysis by connecting the voltage source at the output of the amplifier. Once you are happy with the stability margins, you can run a transient sim and verify the overshoots and settling times.
 

LvW

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bottom_up said:
Thanks all.
But I still have a problem is ,the amplifier used in my bandgap is self_biased. In detail ,the output of the amplifier is the input(gate voltage) of the bias mosfet. In this case ,I am puzzled with how to break the loop.
Waiting for your help.
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There are some ways to determine loop gain without breaking the dc loop. These alternatives have been discussed very often - also in this forum. Try searching for "loop gain simulation".
 

ashish_chauhan

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HI

If your Amp is two stage (self biased) then break the loop at the input of second stage of amplifier.

if not then its better you proceed with middlebook's method.

what do you say LVW?
 

LvW

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ashish_chauhan said:
HI

If your Amp is two stage (self biased) then break the loop at the input of second stage of amplifier.
if not then its better you proceed with middlebook's method.

what do you say LVW?

Just for clarification with respect to a correct wording:

Also MIDDLEBROOK breaks the loop ! Placing a voltage source BETWEEN two nodes means that the ac loop is broken at this point as far as voltage is concerned. If there should be still an error due to the internal voltage at the opamp output caused by the current, this error can be compensated with the second part of his method (current injection into the break point).
 

ashish_chauhan

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Sorry for the typo on "Middlebrook".

Of course even Middlebrook breaks the loop but in that case you can break the loop at any place.

But is it possible that even Middlebrook's method gives wrong results?
just a doubt...
 

LvW

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ashish_chauhan said:
But is it possible that even Middlebrook's method gives wrong results?
just a doubt...

Yes, his method using a voltage and a current source gives wrong results if there is also a signal flow in the direction opposite to the "normal" and classical one.
In this case, his General Feedback Theorem (GFT) has to be applied.
 

dick_freebird

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A 1-Henry inductor in the feedback loop (output to "op
amp" if direct, or feedback ladder to input if scaled) is
a convenient way to get a circuit that will solve at DC
but has a "broken" AC loop. Using a sinusoidal, zero DC
value current source and picking off the input difference
voltage with a vcvs, you can get your input mag & phase
for the plots (even though the values will not be unity
and zero, you can use the result, it's just explicit rather
than implicit and you will have to stuff the calculator by
hand rather than using the canned routines, perhaps).
 

roadway

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I have a question here

if the ratio of two PNPs Q1 an Q2 in bangdap is 1:8

I can use 1PNP for Q1 and 8PNP for Q2
and I can also use 2PNP for Q1 and 16PNP for Q2.

the question is the second method is better than the first? how to approve that?

thanks
 

dick_freebird

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You want primarily to position yourself in the "sweet spot" where
you are affected neither by low-current nor high-current
nonideal / nonmodeled behaviors. You would like to be up on
the beta-vs-Ic curve's "flat top" and beta roughly equal at the
two current densities. You want neither saturation nor significant
leakage / nonideal base current.

You're only talking about a 2:1 difference in current density
(for the same gross setpoint current). So there may not be a
lot to see, unless you are at a presently marginal condition.

For matching, however, "mobetta". Until your "involved area"
begins to be a significant defect (gross, non-statistical mismatch)
target, anyway
 

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