Stability of integrator

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How to make sure the stability of a OP-based integrator?
Do I need to break the feedback loop to measure the loop gain and phase margin?
Or, just use a step response to check the stability?
 

Maybe the integrator cap can be considered as load of the op. So if the op is made with enough stability margin loaded by the cap, this will be done
 

Yes, you need to break the feedback loop to measure the loop gain and phase margin, and don't forget to add the parasitical input capacitor of the amplifier.
 

To Chung-Yuan Chen,
Hwo to do that for measuring the phase margin & gain using Hspice ?
 

The simple method is putting a step pulse signal on the input terminal, do a transient simulating and check output overshoot before reaching steady state.If overshoot is very large ,the integrator isn't stability!
 

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